PhD Candidate · Computer Science and Engineering · The Chinese University of Hong Kong
I am currently a third-year PhD candidate in the Department of Computer Science and Engineering at The Chinese University of Hong Kong (CUHK), affiliated with IDEALab. I am supervised by Prof. Tsung-Yi Ho (IEEE Fellow) and work closely with Prof. Bei Yu. I am also a research intern at Hong Kong Science Park.
My research lies in Electronic Design Automation (EDA), with a focus on Agentic EDA and 3D-IC design: building long-horizon, tool-grounded LLM agents for physical-design workflows such as QoR optimization and post-route ECO, and developing floorplanning and design-space exploration methods for 3D integrated circuits and chiplet-based systems.
Formulates physical-design QoR tuning as a stage-aware tree search over floorplan, placement, CTS and routing checkpoints, with a Judge Agent navigating reusable intermediate design states.
Formulates post-route ECO for 3D-IC design as failure-conditioned agentic repair. Typed timing, routing, layout and violation evidence drives deterministic repair programs executed outside the LLM, and every edit must pass immutable DRC, timing, equivalence and preservation gates.
Removes the up-front netlist partitioning step and jointly optimizes block placement and die assignment directly under physical constraints.
Connects gem5, McPAT, CACTI, HotSpot and analytical 3D floorplanning to expose floorplan-driven thermal, wire and cache effects during architecture exploration. Improves realized BIPS by 13.75% on average across thermally binding configurations.
Embeds exact pin transformations and a convolutional 3D thermal field inside a MILP floorplanner to co-optimize wirelength and temperature. Cuts wirelength by 39–43% and peak temperature by up to 45.9 °C versus prior baselines.
Replaces fixed LP-from-text corpora with an inverse-KKT generator and an agent-runnable Docker environment that produces unlimited problems with certified optima and tunable difficulty.
Unifies global rectilinear floorplanning and legalization for 3D-IC layouts with irregular block shapes.
Email is the best way to reach me: sren@cse.cuhk.edu.hk or renshuo139@gmail.com.
Department of Computer Science and Engineering, The Chinese University of Hong Kong, Shatin, N.T., Hong Kong